World’s largest contract chipmaker, Taiwan Semiconductor Manufacturing Company (TSMC) has reportedly become one of the prominent figures to join hands to co-establish a significant industry consortium. This is the Universal Chiplet Interconnect Express or the UCIe, which is led by Intel Corp, the semiconductor giant based in the United States. The report came forward from Taipei, Taiwan on Friday,March 4.
The focus of the UCIe is its sole goal of creating an open ecosystem which allows chiplets designed and produced on distinct process technologies by different producers to work together. The aim is to make them work together when integrated with latest technologies of packaging. This information was provided by Intel’s Datacenter and AIGroup IO technology solution team strategist, Kurt Lender in a statement.
According to Intel Corp, the founders of the UCIe alliance have added pure-play wafer foundry entities like TSMC to make an ecosystem based on an open chipset. They have included TSMC, cloud services and intellectual property suppliers, integrated circuit packaging and testing service providers in a bid to build this ecosystem. Along with TSMC, another player to join the UCIe consortium is ASE Technology Holding Company, of Taiwan. This company is the world’s largest IC packaging and testing provider.
Other than the two companies from Taiwan, companies from all around the world are participating in the UCIe alliance. These are- ARM Holdings, the computer chip designer based in the U.K., Facebook-parent, Meta Platforms, Google Cloud, Microsoft Corp., Qualcomm Inc., Advanced Micro Devices Inc., based in the US. Finally, Samsung Electronics Corporations, based in South Korea is also going to be a part of the alliance.
“To satisfy the ever-increasing demand for more computing power, Intel and many of our colleagues in the semiconductor industry have come to the same conclusion: The future of chip innovation lies in moving to modular designs based on “chiplet” building blocks, essentially moving from system-on-chip (SoC) to System-on-Package (SoP) chip architectures,” Intel’s Lender said.
Intel specified that these founding members have given approval to the UCIe 1.0 specification which would deliver standardised interconnections. This comprehensive interconnection would include a physical layer, protocol stack, software model and compliance testing. This would push end-users to freely swap chiplet components from a multi-vendor ecosystem SoC structure, one which includes customised SoCs. Intel’s Lender added that chiplets provide designers more flexibility and would open new doors for reuse. They also enable innovation on price, performance and consumption of power through the compute continuum.
<blockquote class=”twitter-tweet”><p lang=”en” dir=”ltr”><a href=”https://twitter.com/hashtag/TSMC?src=hash&ref_src=twsrc%5Etfw”>#TSMC</a> Fouder Morris Chang met with Mike Pompeo <a href=”https://twitter.com/mikepompeo?ref_src=twsrc%5Etfw”>@mikepompeo</a> tonight. (photo: <a href=”https://twitter.com/hashtag/Taiwan?src=hash&ref_src=twsrc%5Etfw”>#Taiwan</a> Vice President Lai Ching-Te Facebook) <a href=”https://t.co/T1EaCtRc1w”>pic.twitter.com/T1EaCtRc1w</a></p>— Wen-Yee Lee 李玟儀 (@Wenyee_Lee) <a href=”https://twitter.com/Wenyee_Lee/status/1499395846516867086?ref_src=twsrc%5Etfw”>March 3, 2022</a></blockquote> <script async src=”https://platform.twitter.com/widgets.js” charset=”utf-8″></script>
