Intel Pay As You Go Feature
Intel Pay As You Go Feature Image Credits: Tomshardware

Intel’s feature for Pay As You Go launched for Windows
Intel's Pay As You Go functionality for Windows has been released.

Intel Pay As You Go Feature
Intel Pay As You Go Feature
Image Credits: Tomshardware

Intel’s enigmatic Software Defined Silicon (SDSi) technique for adding capabilities to Xeon CPUs will be formally supported in Linux 5.18, the operating system’s next major version. SDSi enables consumers to add functionality to their CPU after purchasing it. Formal SDSi support implies that the technology will be available in Intel’s next Xeon processors, meaning that Sapphire Rapids will be the first CPUs to support SDSi.

Intel Pay As You Go Feature

Last September, Intel began distributing Linux patches to enable SDSi capabilities in the operating system. Several changes have already been provided, and it appears that they will be included in Linux 5.18, which is scheduled for release this Spring.

Hans de Goede, a long-time Linux developer who works at Red Hat on a variety of hardware enablement projects, asserts that SDSi will be included in Linux 5.18 if no issues arise, according to Phoronix.

“Presuming no serious issues are discovered, the objective is to have this in before the 5.18 merging window,” de Goede stated.

Intel Software Defined Silicon (SDSi) is a software-based approach for enabling new silicon characteristics in already manufactured and deployed server CPUs. While formal support for the feature is coming to Linux 5.18 and is expected to be released this spring, Intel hasn’t revealed what it expects to enable with its pay-as-you-go CPU upgrade model. We don’t know how it works or what it can accomplish, but we can make informed estimates.

Every generation of Intel Xeon CPUs brings new features to Intel’s server platform, making it more adaptable. In addition to microarchitectural advancements and new instructions, Intel’s Xeon Scalable CPUs (of various versions) now enables up to 4.5TB of memory per socket, network function virtualization, Speed Select technology, and high SGX enclave size, to mention a few features.

There are also optimized models for search, virtual machine density, infrastructure as a service (IaaS), software as a service (SaaS), liquid cooling, media processing, and other applications. Intel intends to provide even more functionality targeted for certain use cases to its 4th Generation Xeon Scalable ‘Sapphire Rapids’ CPUs. An example of the SKU stack is seen above, and it comprises a variety of various Xeon models:L- Large DDR Memory Support (up to 4.5TB)

M- Medium DDR Memory Support (up to 2TB)

N- Networking/Network Function Virtualization

S- Search

T- Thermal

V- VM Density Value

Y- Intel Speed Select Technology

However, almost none of Intel’s clients require all of the provided functions, which is why Intel must provide customized models. The Xeon Scalable 3rd-Gen range, for example, has 57 SKUs. However, in terms of silicon, all of Intel’s Xeon Scalable CPUs are fundamentally the same in terms of core count and clocks/TDP, with specific features simply deactivated to generate distinct models.

Intel certainly earns a premium by offering workload optimized SKUs, but disabling specific features from specific models, then marking them appropriately, and shipping them separately from other SKUs (shipped to the same client) is costly — it can be tens of millions of dollars per year (or even more) in additional logistical costs, not to mention the confusion added to the expansive product stack.

But what if Intel simply supplies base models of its Xeon Scalable CPUs and then allows consumers to buy the additional features they want and enable them via a software update? SDSi enables Intel to accomplish just that. Other use cases involve upgrading certain capabilities as they become necessary and/or reusing old computers.

For example, if a data center has to rearrange CPUs in terms of clocks and TDPs, it may do so without altering servers or CPUs. Intel has yet to reveal all of the features of SDSi and its precise intentions for the mechanism, but at this time, we are very positive that the technology will appear shortly.


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